• 专利附录
  • 专利说明
  • 权利要求
  • 类似技术
  • 同族专利
  • 引用文献
  • 法律状态
  • 优先权
    • 专利摘要:
    The present invention allows a group delay to take a wide range of bands without generating peaks of group delay near the edges on both sides of the pass band, and also enables small adjustment of bandwidth and group delay time. An object of the present invention is to provide an in-band group delay flat circuit having excellent group delay flatness characteristics in a circuit configuration of a circuit, and a distortion compensation amplifier having the same. According to the configuration of the present invention, the resonators 2a, 3a, 2b, and 3b are connected to the two distribution output ports # 2 and # 4 of the hybrid coupler 1a and 1b, respectively, and a plurality of convex group delay circuits are formed. . By varying the center frequency of each convex group delay circuit, an in-band group delay flat circuit is constituted as a whole.
    公开号:KR20030074144A
    申请号:KR10-2003-0010419
    申请日:2003-02-19
    公开日:2003-09-19
    发明作者:에이하마도루；마츠다이라마코토；야마다야스오
    申请人:가부시키가이샤 무라타 세이사쿠쇼；
    IPC主号:
    专利说明:

    A group delay flat circuit in a band and a distortion compensational type amplifier
    [27] The present invention relates to an in-band group delay flat circuit and a distortion compensation amplifier used in a high frequency band.
    [28] In recent years, in the base station radio apparatus of a mobile communication system, in order to reduce the size of a base station, many distortion-compensating amplifiers have been used.
    [29] As a distortion compensation circuit, for example, in a feed forward amplifier, it is necessary to match the group delay time on the large power side and the small power side in the distortion detection circuit and the distortion suppression circuit. Initially, coaxial lines (cables) were used for them, but recently, delay filters have been used for miniaturization and low loss.
    [30] Naturally, the delay filter requires a flatness of the group delay time in the passband (small of the group delay time deviation). Conventionally, a multistage band pass filter has been used for the delay filter. An example thereof is shown in FIGS. 14 to 16. Fig. 14 is an equivalent circuit diagram of a delay filter composed of eight stage resonators. Here, Ra to Rh are resonators, respectively, and couple between adjacent resonators through a capacitor.
    [31] Fig. 15 is a structural diagram of the delay filter. Reference numeral 4 is a substrate, and a coaxial resonator represented by Ra to Rh and a coupling substrate 21 constituting a plurality of capacitors are mounted on the upper surface of the substrate 4. The center conductor of each coaxial resonator is connected to a predetermined electrode of the coupling substrate 21.
    [32] Fig. 16A shows the group delay characteristics of this delay filter, and Fig. 16B shows the passage characteristics.
    [33] Also, Japanese Patent Laid-Open No. 2001-257505 discloses a delay filter in which a parallel capacitance for jump coupling is added to a standard band pass filter. Examples thereof are shown in FIGS. 17 to 19. 17 is an equivalent circuit diagram and FIG. 18 is a structural diagram. In this example, the second stage resonator Rb and the fifth stage resonator Re are jump-coupled by parallel capacitance. Reference numeral 22 shown in Fig. 18 is a bonding substrate for the jump coupling thereof. Fig. 19A shows the group delay characteristics of this delay filter, and Fig. 19B shows the passage characteristics.
    [34] Further, WO01 / 01511A1 discloses a technique for flattening the overall group delay characteristics by adding a circuit having convex group delay characteristics to a band pass filter having a concave group delay characteristic. 20 shows an example. 20A shows the group delay characteristics, and FIG. 20B shows the passage characteristics. In Fig. 20A, b represents a concave group delay characteristic, and c represents a convex group delay characteristic. By adding these two characteristics, in-band group delay flatness characteristic represented by a is obtained. In Fig. 20B, S21 is a pass characteristic between input and output, S11 is a reflection characteristic at the input side, and S22 is a reflection characteristic at the output side.
    [35] Further, in these conventional examples, in order to obtain characteristics such as a pass band of 2110 to 2170 MHz, a group delay amount of 7.5 ns, and a group delay deviation of 0.2 ns, in the above-described multistage band pass filter, eight dielectrics (8 stages) A resonator is required, and six (six stages) of dielectric resonators are required in the band pass filter of Japanese Patent Laid-Open No. 2001-257505 and the delay filter of WO01 / 01511A1, respectively.
    [36] In any of the conventional techniques described above, since the group delay amount peaks are located near the edges on both sides of the pass band, it is difficult to take a wide band where the group delay is flat. In order to make the group delay bandwidth wide, the number of stages of the resonators constituting the band pass filter is increased. As a result, the size of the outline size is increased and the insertion loss is increased. In addition, increasing the number of stages of the resonator causes a problem that the peak of the group delay amount near the pass band edge becomes larger.
    [37] In addition, when changing the group delay time, in any conventional technique, it is necessary to change the bandwidth of the band pass filter. In general, in a band pass filter, in order to change the bandwidth, it is necessary to match the coupling coefficient between the resonators and the resonant frequency of each resonator. Therefore, in the case of adjusting the group delay time in the mass production process, the adjustment is difficult and a problem arises in that a large amount of adjustment time is required.
    [38] In addition, since the above-mentioned parallel capacitance for jump coupling is small compared with the capacitance for coupling between adjacent resonators, the variation in characteristics during manufacturing is largely affected by the stray capacitance generated in addition to the capacitance shown in the equivalent circuit of FIG. This problem also arises.
    [39] SUMMARY OF THE INVENTION An object of the present invention is to solve the above problems and to provide an in-band group delay flat circuit having excellent group delay flatness characteristics in a small circuit configuration, and a distortion compensation amplifier having the same.
    [1] 1 is an equivalent circuit diagram of an in-band group delay flat circuit according to the first embodiment.
    [2] 2 is a structural diagram of the circuit.
    [3] 3 is a diagram illustrating a configuration of a coupler used in the circuit.
    [4] 4 is a diagram illustrating examples of group delay characteristics and pass characteristics of the circuit.
    [5] 5 is a diagram illustrating a relationship between characteristic impedance and group delay characteristics of a resonance circuit connected to a coupler.
    [6] FIG. 6 is a diagram illustrating a configuration of a coupler used in the band group delay flat circuit according to the second embodiment. FIG.
    [7] 7 is an equivalent circuit diagram of an in-band group delay flat circuit according to the third embodiment.
    [8] 8 is a structural diagram of the circuit.
    [9] 9 is a diagram illustrating examples of group delay characteristics and pass characteristics of the circuit.
    [10] FIG. 10 is a diagram illustrating a configuration of a coupler used in a band group delay flat circuit according to the fourth embodiment. FIG.
    [11] 11 is a structural diagram of the circuit.
    [12] 12 is a diagram illustrating a relationship between capacitance of a capacitor in a resonant circuit and group delay amount.
    [13] FIG. 13 is a diagram illustrating a configuration of a distortion compensation amplifier according to a fifth embodiment. FIG.
    [14] Fig. 14 is an equivalent circuit diagram of a group delay circuit of a conventional band pass filter type.
    [15] 15 is a structural diagram of the circuit.
    [16] Fig. 16 is a diagram illustrating examples of group delay characteristics and pass characteristics of the circuit.
    [17] 17 is an equivalent circuit diagram of a group delay circuit of another conventional band pass filter type.
    [18] 18 is a structural diagram of the circuit.
    [19] 19 is a diagram illustrating examples of group delay characteristics and pass characteristics of the circuit.
    [20] 20 is a diagram illustrating an example of group delay characteristics and pass characteristics of a group delay circuit formed by combining a convex group delay circuit with a band pass filter according to the related art.
    [21] <Brief description of the main parts of the drawing>
    [22] 1: coupler 2, 3: resonator
    [23] 4 substrate 5, 6 capacitor
    [24] 10: convex group delay circuit 11, 13: distributor
    [25] 12, 18: amplifier 14, 16: group delay flat circuit
    [26] 15, 17: synthesizer 21, 22: bonded substrate
    [40] The present invention includes two or more convex group delay circuits having convex group delay characteristics, which are shorter in delay time from a center frequency, and have different center frequencies of the convex group delay circuits. The circuits are connected in series to form an in-band group delay flat circuit.
    [41] The present invention is also characterized in that the convex group delay circuit is composed of a hybrid coupler and a resonant circuit connected to a distribution output port of the hybrid coupler.
    [42] In addition, the present invention is characterized in that the resonant circuit is composed of a dielectric coaxial resonator.
    [43] The present invention is also characterized in that the resonance circuit is constituted by a series circuit of a dielectric coaxial resonator and a reactance element.
    [44] In addition, the present invention forms three or more stages of the convex group delay circuit, wherein the group delay time of the convex group delay circuit having the highest center frequency and the convex group delay circuit having the lowest center frequency is different from that of the other convex group delay circuit. It is characterized by larger than the group delay time.
    [45] Further, the present invention is a distortion compensation amplifier that performs distortion compensation by adjusting the group delay time of the group delay circuit, wherein the group delay circuit is constituted by an in-band group delay flat circuit having any one of the above configurations. do.
    [46] The present invention is also characterized in that the distortion compensating amplifier circuit comprises a feed forward amplifier comprising a distortion detection loop and a distortion suppression loop each including a group delay circuit.
    [47] Embodiment of the Invention
    [48] The configuration of the in-band group delay flat circuit (hereinafter, simply referred to as "group delay flat circuit") according to the first embodiment will be described with reference to FIGS. 1 to 5.
    [49] 1 is a circuit diagram of a group delay flat circuit. Here, reference numerals 2a, 2b, 3a, and 3b are resonators, respectively. Reference numerals 1a and 1b denote four-port hybrid couplers (hereinafter, simply referred to as "couplers"). Port # 1 of these couplers 1a and 1b is an input port, ports # 2 and # 4 are distributed output ports, and port # 3 is an end port. In this case, however, the resonators 2a, 3a, 2b, and 3b are connected to the distribution output ports # 2 and # 4, thereby terminating in these resonators. And termination port # 3 is used as an output port.
    [50] Reference numeral 10a denotes a convex group delay circuit by the coupler 1a and two resonators 2a and 3a. The signal input from the input terminal is input to port # 1 of the coupler 1a and output to two ports # 2 and # 4. Since the resonant circuits of the resonators 2a and 3a are connected to these ports, respectively, the signals to which the characteristics of the resonant circuits are added are inputted oppositely from the ports # 2 and # 4, and they are output from the output port # 3. Accordingly, as will be described later, the convex group delay characteristics are exhibited.
    [51] Similarly, reference numeral 10b denotes a convex group delay circuit comprising a coupler 1b and two resonators 2b and 3b, and exhibits convex group delay characteristics.
    [52] Port # 3 of the coupler 1a, which is the output of the convex group delay circuit 10a, is connected to port # 1 of the coupler 1b, which is an input of the convex group delay circuit 10b. Port # 1 of the coupler 1a is the input of the convex group delay circuit 10a, and port # 3 of the coupler 1b is the output of the convex group delay circuit 10b.
    [53] Thereby, two convex group delay circuits 10a and 10b are connected in series.
    [54] In this way, a group delay flat circuit is formed by connecting two convex group delay circuits 10a and 10b in series, that is, two convex group delay circuits 10a and 10b.
    [55] 2 is a configuration diagram of a group delay flat circuit. Reference numeral 4 is a substrate, and four resonators 2a, 3a, 2b, and 3b are mounted on the upper surface thereof. Each of these resonators is a dielectric coaxial resonator. Each dielectric coaxial resonator has a prismatic dielectric block having a through hole in the center thereof, an inner conductor is formed on the inner surface of the through hole, and an outer conductor is formed on the outer surface of the dielectric block. In addition, a pin terminal conducting to the inner conductor is inserted into the through hole. The outer conductors of these dielectric coaxial resonators are connected to the ground electrodes on the substrate 4, and these pin terminals are connected to the electrode patterns on the upper surface of the substrate 4. In addition, couplers 1a and 1b are mounted on the upper surface of the substrate 4 and connected to the electrode patterns on the substrate. With this structure, four ports # 1 to # 4 of the coupler 1a are connected to the input terminals, the resonators 2a and 3a, and the input portions of the coupler 1b, respectively, via an electrode pattern on the substrate. Four ports # 1 to # 4 of the coupler 1b are connected to the output portions of the coupler 1a, the resonators 2b and 3b, and the output terminals, respectively, via an electrode pattern on the substrate.
    [56] 3 is a diagram illustrating a configuration of the coupler. In this example, the hybrid coupler by coupling of two lines is comprised. That is, the input signal from the port # 1 is divided into power by half, and distributed from the ports # 2 and # 4. If you terminate these ports # 2 and # 4, there will be no output from port # 3. However, by connecting resonators to ports # 2 and # 4, respectively, as shown in Fig. 1, signals having a group delay amount at the actual resonant frequency of those resonators are output from port # 3.
    [57] Fig. 4 is a diagram showing the characteristics of this group delay flat circuit. Fig. 4A shows the group delay characteristics, Fig. 4B shows the passage characteristics, and Fig. 4C shows the passage characteristics of the first stage 10b of the convex group delay circuit. In these figures, the horizontal axis is frequency [MHz]. The same applies to other drawings referred to later.
    [58] In FIG. 4A, a represents group delay characteristics of the convex group delay circuit 10a, and b represents group delay characteristics of the convex group delay circuit 10b. C represents group delay characteristics of the entire group delay flat circuit shown in FIG. The vertical axis of this figure is the group delay time [ns]. The same applies to the drawings of other group delay characteristics referred to later.
    [59] The center frequency of the group delay characteristic of the first stage convex group delay circuit 10a is 2095 MHz, and the center frequency of the group delay characteristic of the second stage convex group delay circuit 10b is about 2185 MHz. In this manner, by using a convex group delay circuit having a shorter delay time as it moves away from the center frequency, and combining the peak frequencies different from each other, as shown by c, a predetermined frequency in which two group delay characteristics are synthesized. The group delay time is flat within the band.
    [60] In Fig. 4B, S21 is a pass characteristic between input and output of the group delay flat circuit, S11 is its input side reflection characteristic, and S22 is its output side reflection characteristic. In Fig. 4C, S21 is a passage characteristic between the input and output of the convex group delay circuit, S11 is its input side reflection characteristic, and S22 is its output side reflection characteristic. In these figures, the vertical axis represents the amount of attenuation [dB]. The same applies to the drawings of other passage characteristics referred to later.
    [61] Since the coupler is used in this way, the reflection on the input side and output side is suppressed low over a wide frequency band. In addition, the passage characteristics of the two convex group delay circuits 10a and 10b do not exhibit attenuation characteristics as in the coaxial line. Therefore, as shown in Fig. 4B, the pass characteristic between the input and output of the group delay flat circuit is flat in a wide frequency band.
    [62] In addition, in the example shown in FIG. 3, although the coupler was comprised by the distributed coupling type 3dB hybrid coupler, this coupler should just have the function of a hybrid coupler. As described later, a hybrid coupler using a bridge circuit may be used. That is, a four port coupler having a predetermined coupling amount between specific ports and insulated from other ports may be used.
    [63] However, it is impossible to increase or decrease the group delay time only by the hybrid coupler. However, the group delay time of the convex group delay circuits 10a and 10b can be increased or decreased by the impedance of the resonance circuit connected to the hybrid couplers 1a and 1b. In the example shown in FIG. 1, the group delay time can be increased or decreased by changing the characteristic impedance of the resonators 2a, 3a, 2b, and 3b constituting the resonant circuit.
    [64] In order to change the characteristic impedance of a dielectric coaxial resonator, there exists a method of changing the ratio of the internal diameter and the external diameter of a dielectric coaxial resonator, the method of changing a dielectric constant, etc. Here, an example of group delay characteristics in the case of changing the characteristic impedance is shown in FIG. In Fig. 5, a is a characteristic impedance of 2.0Ω, b is a characteristic impedance of 4.0Ω, and c is a characteristic impedance of 6.0Ω. In this way, the group delay time can be increased as the characteristic impedance is reduced.
    [65] In the case of adjusting the group delay time in the mass production process, the peak frequency of the convex group delay circuit 10 is varied so as to respond. That is, when the convex group delay circuit is connected in two stages as shown in Fig. 1, when the difference between the peak frequencies of the group delay times of the two convex group delay circuits 10a and 10b is increased, If the delay time is reduced and, conversely, if the frequency difference between the two peak frequencies is reduced, the group delay time of the whole becomes large. The peak frequency of the group delay time of the convex group delay circuits 10a and 10b is adjusted by adjusting the resonance frequencies of the resonators 2a, 3a, 2b and 3b. For example, in the case of a quarter-wavelength dielectric coaxial resonator, the resonance frequency is increased by trimming the open surface, and the resonance frequency is lowered by trimming the short surface.
    [66] Next, FIG. 6 shows an example of a hybrid coupler used in the group delay flat circuit according to the second embodiment.
    [67] 6 is a hybrid coupler by a bridge circuit having inductors L1 and L2 and a capacitor (capacitor) C0. The hybrid coupler by this bridge circuit is applied to the coupler 1a, 1b shown, for example in FIG. That is, a hybrid coupler by this bridge circuit is used instead of the coupler of the structure shown in FIG. Therefore, two resonators are connected to the hybrid coupler by the bridge circuit to form one convex group delay circuit, and two convex group delay circuits are connected in series to form a group delay flat circuit.
    [68] In Fig. 6, IN is an input terminal and OUT is an output terminal. The circuit constants are determined so that the phase between each terminal is 1/4 wavelength at the frequency of use.
    [69] When a signal is input from IN, the signal is divided into a path from IN to OUT and from IN to terminal 1 to terminal 2 to OUT. Therefore, these two signals are in reverse phase relationship at the OUT terminal. In addition, circuit constants are determined so that the amplitudes of the signals propagated through these two paths are equal. Therefore, the signal input from IN does not appear directly at OUT.
    [70] In addition, the signal input from IN is divided into a path from IN to terminal 1, and is divided into a path from IN to OUT to terminal 2 to terminal 1. Therefore, these two signals are in reverse phase relationship at the terminal 1. However, since the amplitudes of the signals propagated through these two paths are not the same (since the circuit constants are set so as not to be the same), the signal input from IN is output to terminal 1.
    [71] In addition, the signal input from IN is divided into a path from IN to terminal 1 to terminal 2 and is transmitted from IN to OUT to terminal 2. Since these two signals have the same phase relationship at the end 2, the signal input from IN is output at the end 2.
    [72] Since the resonant circuit is connected to the terminal 1 (port # 2), the signal output to the terminal 1 is terminated by the resonator. As a result, a signal to which the characteristics of the resonant circuit is added is input from the end 1 this time. This signal is divided into a path from end 1 to IN to OUT, and from end 1 to end 2 to OUT. Since these two signals have the same phase relationship at OUT, the signal input from terminal 1 is output to OUT.
    [73] Similarly, since the resonant circuit is connected to the terminal 2 (port # 4), the signal output to the terminal 2 is terminated by the resonator. As a result, the signal to which the characteristic of the resonant circuit is added is input from this time end 2. This signal is divided into a path from end 2 to OUT and a path from end 2 to end 1 to IN to OUT. These two signals are in phase out at OUT. However, since the amplitudes of the signals propagated through these two paths are not the same (since the circuit constants are set so as not to be the same), the signal input from the terminal 2 is output to OUT.
    [74] As described above, the signal to which the characteristics of the two resonant circuits are added to the signal input from IN is output from OUT.
    [75] Next, the structure of the group delay flat circuit which concerns on 3rd Embodiment is demonstrated with reference to FIGS.
    [76] 7 is a circuit diagram thereof. In the example shown in Fig. 1, two convex group delay circuits are used. In the example shown in Fig. 7, three convex group delay circuits 10a, 10b, and 10c are used. That is, port # 3 of the coupler 1a, which is the output of the convex group delay circuit 10a, is connected to port # 1 of the coupler 1b, which is an input of the convex group delay circuit 10b. Port # 3 of the coupler 1b, which is the output of the convex group delay circuit 10b, is connected to port # 1 of the coupler 1c, which is an input of the convex group delay circuit 10c. Port # 1 of the coupler 1a is an input of the convex group delay circuit 10a, and port # 3 of the coupler 1c is an output of the convex group delay circuit 10c.
    [77] Thereby, three convex group delay circuits 10a, 10b, and 10c are connected in series.
    [78] 8 is a structural diagram of this group delay flat circuit. As in the case of the first embodiment, the resonators 2a, 3a, 2b, 3b, 2c, and 3c are mounted on the substrate 4 together with the couplers 1a, 1b, and 1c. That is, these resonators are dielectric coaxial resonators, respectively, and their external conductors are connected to the ground electrode on the substrate 4, and their pin terminals are connected to the electrode pattern on the upper surface of the substrate 4. In addition, the coupler 1a, 1b, 1c is mounted on the upper surface of the board | substrate 4, and is connected to the electrode pattern on a board | substrate. With this structure, four ports # 1 to # 4 of the coupler 1a are connected to the input terminals, the resonators 2a and 3a, and the input portions of the coupler 1b, respectively, via an electrode pattern on the substrate. Four ports # 1 to # 4 of the coupler 1b are connected to the output of the coupler 1a, the resonators 2b and 3b, and the input of the coupler 1c, respectively, via an electrode pattern on the substrate. . Four ports # 1 to # 4 of the coupler 1c are connected to the output portions of the coupler 1b, the resonators 2c and 3c, and the output terminals, respectively, via an electrode pattern on the substrate.
    [79] 9 shows group delay characteristics and pass characteristics of this group delay flat circuit. In FIG. 9A, a is a group delay characteristic of the convex group delay circuit 10a, b is a group delay characteristic of the convex group delay circuit 10b, and c is a group delay characteristic of the convex group delay circuit 10c. D represents the group delay characteristics of the entire group delay flat circuit. In this manner, the synthesis characteristics of the three convex group delay circuits are obtained.
    [80] By increasing the number of convex group delay circuits in this way, it is possible to widen the bandwidth of the group delay amount of the entire group delay flat circuit. As shown in Fig. 1, in the two-stage convex group delay circuit, if the frequency difference between the center frequency (peak frequency) of the group delay characteristics of both is made too large, the group delay characteristic of the entire group delay flat circuit is pitted at its center portion. Pair group delay deviation becomes large. Therefore, the convex group delay circuit of three or more stages may be formed according to the group delay variation and the bandwidth required. At that time, the group delay time of the convex group delay circuit having the highest center frequency and the convex group delay circuit having the lowest center frequency is set larger than the group delay time of the other group delay circuit. In the example shown in FIG. 9A, the maximum group delay time of the convex group delay characteristic shown by a and c is set higher than the maximum delay time of the convex group delay characteristic shown by b. This flattens the group delay variation in a wider frequency band.
    [81] As shown in Fig. 9B, even when the convex group delay circuit has three stages, low insertion loss characteristics and low reflection characteristics can be obtained over a wide frequency band.
    [82] Next, the structure of the group delay flat circuit which concerns on 4th Embodiment is demonstrated with reference to FIGS.
    [83] 10 is an equivalent circuit diagram thereof. Unlike the group delay flat circuit according to the first embodiment shown in FIG. 1, the resonant circuit connected to the couplers 1a and 1b is a series circuit of a capacitor and a resonator. That is, reference numerals 5a, 6a, 5b, and 6b are capacitors connected in series with the resonators 2a, 3a, 2b, and 3b, respectively, which are dielectric resonators.
    [84] 11 is a structural diagram of this group delay flat circuit. On the upper surface of the substrate 4, couplers 1a and 1b, resonators 2a, 3a, 2b and 3b serving as dielectric coaxial resonators and capacitors 5a, 6a, 5b and 6b are mounted, respectively.
    [85] In the first embodiment, the characteristic impedance of the dielectric resonator is changed in order to adjust the group delay time, but as a result, the Q value of the resonator may deviate from the condition in which the maximum value is reached. However, as shown in FIG. 10, if the group delay time is adjusted by changing the capacitance value of the capacitor in the resonant circuit, the Q optimum condition of the resonator can be maintained.
    [86] 12 shows group delay characteristics at one stage of the convex group delay circuit in the case where the capacitance value of the capacitor is changed. Here, a is 1.0 pF, b is 1.5 pF, c is 2.0 pF, which is a group delay characteristic when the capacitance value of the capacitor is determined, respectively. Thus, when the capacitance value of the capacitor connected in series is made small, the maximum delay time of group delay characteristic will become large. In this example, the resonator length of the dielectric resonator is adjusted so that the resonant frequency of the resonant circuit is constant at 2140 MHz.
    [87] In addition, the same effect can be obtained even if the capacitor used for the said resonant circuit is replaced with the coil (inductor). In that case, the maximum group delay time of group delay characteristics can be adjusted by adjusting the inductance added in series. In that case, the smaller the inductance, the smaller the maximum delay time. In this manner, by connecting a reactance element to the resonator in series to form a resonant circuit and adjusting the reactance, the maximum value of the group delay time can be adjusted.
    [88] In the first to fourth embodiments, a dielectric coaxial resonator is used as the resonator, but in general, the dielectric coaxial resonator has a high no-load Q (Qo). Therefore, as shown, for example, in S21 characteristic of FIG. 9B, insertion loss of a group delay flat circuit can be reduced.
    [89] As the resonator, in addition to such a dielectric resonator, an LC resonant circuit or a SAW resonator (elastic surface wave element) may be used.
    [90] Next, the structure of the distortion compensation amplifier which concerns on 5th Embodiment is demonstrated with reference to FIG.
    [91] 13 is a block diagram of a distortion compensation amplifier by a feed forward amplifier. Here, the divider 11 distributes the input signal. The amplifier 12 amplifies the signal distributed by the divider 11 and outputs it to the divider 13. The group delay flat circuit 16 delays the signal distributed by the divider 11 and provides it to the synthesizer 17. The divider 13 distributes the output signal from the amplifier 12. The synthesizer 17 synthesizes the signal from the divider 13 and the signal from the group delay flat circuit 16 and outputs it to the amplifier 18. The amplifier 18 amplifies this and provides it to the synthesizer 15. The group delay flat circuit 14 delays the signal from the divider 13 and provides it to the synthesizer 15. The synthesizer 15 synthesizes and outputs the signal from the group delay flat circuit 14 and the signal from the amplifier 18.
    [92] The divider 11, amplifier 12, divider 13, synthesizer 17, and group delay flat circuit 16 form a distortion detection loop. That is, the result of combining the signal provided from the divider 13 to the combiner 17 and the signal provided from the group delay flat circuit 16 to the combiner 17 is proportional to the distortion component generated by the amplifier 12. Corresponds to the signal. The distributor 13, group delay flat circuit 14, synthesizer 15, synthesizer 17, and amplifier 18 form a distortion suppression loop. That is, the amplifier 18 amplifies the distortion component output from the combiner 17 and provides it to the combiner 15 as a distortion suppression signal. This cancels out the nonlinear distortion component of the amplifier 12. Here, the group delay flat circuit 16 determines the delay time so that a signal is input to the synthesizer 17 with the same delay time as the signal path of the amplifier 12. Similarly, the group delay flat circuit 14 sets the delay time so that the distortion suppression signal is synthesized out of phase by the synthesizer 15.
    [93] According to the present invention, by combining a plurality of convex group delay circuits having different center frequencies of group delay characteristics without using a band pass filter as in the prior art, the group delay time variation in a wide frequency band is increased without increasing the circuit scale. A small in-band group delay flat circuit can be obtained.
    [94] Further, according to the present invention, since the convex group delay circuit is composed of a hybrid coupler and a resonant circuit connected to the distribution output port, the circuit can be configured by using a small component and by using a small resonator. Therefore, the size and weight can be reduced and the cost can be reduced.
    [95] According to the present invention, the resonance circuit connected to the hybrid coupler is constituted by a dielectric coaxial resonator, whereby the overall size can be reduced, and the resonance frequency can be easily adjusted.
    [96] Further, according to the present invention, the resonance circuit connected to the hybrid coupler is formed of a series circuit of a dielectric coaxial resonator and a reactance element, so that the resonance frequency of the resonance circuit can be easily determined without lowering the Q value of the dielectric coaxial resonator. have. As a result, the frequency band can be adjusted while keeping the delay time variation of the in-band group delay flat circuit small.
    [97] Further, according to the present invention, the convex group delay circuit is formed in three or more stages, and the delay times of the convex group delay circuit having the highest center frequency and the convex group delay circuit having the lowest center frequency are different from those of the other convex group delay circuit. By making it larger than the group delay time, a flat group delay time can be obtained over a wider frequency band.
    [98] Further, according to the present invention, by configuring the distortion compensation amplifier using the in-band group delay flat circuit, more accurate distortion detection and distortion suppression can be performed, and a low distortion amplifier can be obtained.
    [99] Further, according to the present invention, by configuring a feedforward amplifier each including a group delay circuit in the distortion detection loop and the distortion suppression loop, more accurate distortion suppression is possible with a smaller circuit.
    权利要求:
    Claims (7)
    [1" claim-type="Currently amended] 2 or more convex group delay circuits having convex group delay characteristics, the delay time of which is shorter from the center frequency, different center frequencies of the convex group delay circuits, and each convex group delay circuit in series In-band group delay flat circuit characterized in that the connection is made.
    [2" claim-type="Currently amended] The in-band group delay flat circuit according to claim 1, wherein the convex group delay circuit comprises a hybrid coupler and a resonance circuit connected to a distribution output port of the hybrid coupler.
    [3" claim-type="Currently amended] The in-band group delay flat circuit according to claim 2, wherein the resonance circuit is constituted by a dielectric coaxial resonator.
    [4" claim-type="Currently amended] The in-band group delay flat circuit according to claim 2, wherein the resonance circuit is constituted by a series circuit of a dielectric coaxial resonator and a reactance element.
    [5" claim-type="Currently amended] The convex group delay circuit according to any one of claims 1 to 4, wherein the convex group delay circuit forms at least three stages of convex group delay circuits and has the highest center frequency thereof, and the group delay of the convex group delay circuit having the lowest center frequency. An in-band group delay flat circuit, wherein the time is larger than the group delay time of other convex group delay circuits.
    [6" claim-type="Currently amended] A distortion compensation amplifier for performing distortion compensation by adjusting a group delay time of a group delay circuit, wherein the group delay circuit is constituted by the in-band group delay flat circuit according to any one of claims 1 to 4. Distortion-compensated amplifier.
    [7" claim-type="Currently amended] 7. The distortion compensating amplifier according to claim 6, wherein the distortion compensating amplifier is a feed forward amplifier comprising a distortion detection loop and a distortion suppression loop each including a group delay circuit.
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    同族专利:
    公开号 | 公开日
    CN100440726C|2008-12-03|
    EP1343218A2|2003-09-10|
    EP1343218A3|2004-03-31|
    US20030169123A1|2003-09-11|
    US6958663B2|2005-10-25|
    KR100480796B1|2005-04-07|
    CN1444335A|2003-09-24|
    JP2003264404A|2003-09-19|
    引用文献:
    公开号 | 申请日 | 公开日 | 申请人 | 专利标题
    法律状态:
    2002-03-07|Priority to JP2002062162A
    2002-03-07|Priority to JPJP-P-2002-00062162
    2003-02-19|Application filed by 가부시키가이샤 무라타 세이사쿠쇼
    2003-09-19|Publication of KR20030074144A
    2005-04-07|Application granted
    2005-04-07|Publication of KR100480796B1
    优先权:
    申请号 | 申请日 | 专利标题
    JP2002062162A|JP2003264404A|2002-03-07|2002-03-07|In-band group delay flattening circuit and distortion compensation type amplifier|
    JPJP-P-2002-00062162|2002-03-07|
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